ㆍ▷ 32-채널, 50 MHz, 200 MB/s 디지털 I/O 디바이스
ㆍ▷ Refer to the Waveform Specificationssection for more
ㆍ▷ Direction control of RTSI/PXI trigger channels
ㆍ▷ 3 bidirectional clock terminals
Features
Specification & Introduction
Channel Specifications
▷ Specification Comments
▷ Number of data
Value
32
channels
—
▷ Direction control of data channels
Value
Per channel
channels
—
▷ Number of Programmable Function Interface (PFI) channels
Value
6
channels
Refer to the Waveform Specificationssection for more
information about the PFI channels.
▷ Direction control of PFI channels
Value
Per channel
channels
—
▷ Number of RTSI/PXI trigger channels
Value
PXI Express
10 (PXI_TRIG<0..7>,
PXIe_DSTARB,
PXIe_DSTARC)
PCI Express
8 (RTSI <0..7>)
Direction control of RTSI/PXI trigger channels
RTSI <0..7>/PXI_TRIG<0..7>: Bidirectional; per channel
PXIe_DSTARB: Unidirectional input (PXI Express only)
PXIe_DSTARC: Unidirectional output (PXI Express only)
Comments
PXI_TRIG7 is not supported as input trigger.
▷ Number of Sample clock terminals
Value
3 bidirectional clock terminals (PFI 4, PFI 5, RTSI 7)
1 exported clock terminal (PXIe_DSTARC)
(PXI Express only)
2 clock source terminals (PXIe_DSTARA, PXI_STAR)
(PXI Express only)
Comments
Refer to Timing Specifications for more information about clock sources.
Ordering Information